简历请投递到 : hfzhu@marvell.com

工作地点可以是上海或者成都，有USB或者PCIE IP设计经验的最好，没有也没有关系。 

Job Title: ASIC Design Engineer

Department: SoC Platform

Location: Chengdu & Shanghai

1. Experienced with IP design, verification and SoC integration.

2. Hands-on experience with standard design flow and tools on various design phases, including documentation, coding, lint, CDC, version control and RTL/gate simulation.

3. Experience with USB/PCIE IP design & verification is a plus

4. Experience with SystemVerilog and UVM is a plus.

5. Experience with FPGA prototyping is a plus.

6. Must be able to communicate in both written and spoken English.

7. Good team work spirit and problem solving skills

Description:

This position is in a leading edge fast growing US semiconductor company. As an ASIC design engineer, the individual will have the opportunity to work closely with US team on exciting IPs on latest and greatest design methodology and flow.

Responsibility includes:

1. Participating architect, micro-architect, and execution of the projects.

2. RTL coding, Verification, Logic simulations, synthesis, timing, silicon bring-up, etc

3. Documentation

4. Work closely with FPGA team for pre-silicon prototyping.

5. Work closely with software team for IP validation

6. Traveling to US is not mandatory, but sometimes required