意法半导体公司招聘版图设计工程师 （需求本科电科专业）

             Profile for Job Posting – Layout Design Engineer

Job Title:     Layout Design Engineer

Job Responsibilities:

-  Analog layout design for Smart power IC, from schematic to GDSII;

-  Analog cell layout, DRC/LVS/ERC physical verification and ICPack check;

Requirements:

-  Bachelor degree in Semiconductor, Electronics Engineering areas;

-  Good understanding of semiconductor theory and structures of devices;

-  Fluent and well spoken English mandatory (frequent communication with overseas teams);

-  Teamwork, flexibility & initiative;

 请有意向的本科电科专业同学将简历发送至 Grant.Yang@st.com