The rapid advance of technology continues to push up transistor integration capacity, which allows a large number of processing/IP cores to be integrated into a Chip Multiprocessor (CMP) or a Multiprocessor System-on-Chip (MPSoC) design. The realization of a scalable on-chip communication infrastructure faces critical challenges in meeting the large bandwidth capacities and stringent latency requirements demanded by these many cores in a power-efficient fashion. Network-on-chips (NoCs) have been widely adopted to provide sufficient bandwidth and latency requirements. However, with the vastly increasing on-chip and off-chip communications, the interconnection power consumption becomes a growing problem. Photonic Network-on-Chips (NoCs) are proposed as a promising solution to satisfy the high bandwidth requirements of many-core applications while deliver a dramatic reduction in power consumed intrachip communications. In this talk, first the emerging on-chip photonic devices that enable the development of photonic NoCs will be introduced. Then a survey of existing photonic NoC architectures will be provided. Next, our work on the wavelength routed optical networks (WRON) will be presented followed by our future plan.