Course Introduction

Hardware Description Language (HDL) is a kind of language which is aiming at describing digital systems formally. This course focuses on building models for digital systems at different levels with the examples in Verilog HDL and discusses the principles of writing testbench and system verification as well. In addition, the reader is expected to learn the techniques for building models and simulation of digital systems by using relative simulation software to bridge the gap between HDL and digital implementations and verifications.